1. Field of the Invention
This invention relates to a method of manufacturing a silicon single crystal substrate having a gettering capacity, which is used for manufacturing such semiconductor devices as large-scale integrated circuits.
2. Prior Art
Up to date, semiconductor devices such as large-scale integrated circuits are manufactured in very clean environments. However, a silicon single crystal substrate (hereinafter referred to as Si substrate) is subject to contamination, although very slightly, due to heavy metals (i.e., iron, nickel, copper, etc.) while it is subjected to many processes such as dry etching. Such contamination due to heavy metals leads to deterioration of the eventual semiconductor device and ultimately reduces the yield of manufacture of the product.
The contaminant impurities as noted above are removed from device formation regions by means of gettering. As one of the well-known gettering techniques, there is a technique of extrinsic gettering. In this technique, crystalline defects or like strains are introduced mainly into the back surface of the Si substrate to capture contaminant impurities attached to the Si substrate surface, i.e., the device formation surface. In a reported method of the extrinsic gettering, a polycrystalline silicon film is formed on the Si substrate back surface, and crystalline defects in crystal grain and grain boundaries in the polycrystalline silicon film serve as a source of gettering, as disclosed in, for instance, Japanese Patent Laid-Open No. 282,814/1989. Such a Si substrate is obtained by depositing, on its entire surface in a coarsely polished state, a polycrystalline silicon film and mirror surface finish polishing only one principal surface. In this case, the polycrystalline silicon is deposited to about 1 to 2 microns by chemical vapor deposition at a temperature of about 600.degree. to 800.degree. C.
As another well-known means of Si substrate gettering, there is a process called intrinsic gettering, which utilizes crystalline defects due to precipitation of interstitial oxygen (Oi) contained in the Si substrate. It is well known in the art that with a Si substrate with extrinsic gettering provided by polycrystalline silicon, the generation of crystalline defects due to the precipitation of Oi is enhanced on the back surface side of the substrate due to strain produced by the polycrystalline silicon film or by absorption of interstitial Oi Transactions of the 37-th Applied Physics Association Meeting, 1990. Vol. 29a-R-1 p. 219). However, the polycrystalline silicon deposition temperature (i.e., 600.degree. to 800.degree. C.) is in a temperature range, in which Oi precipitation nuclei are formed most greatly. Therefore, the region of generation of crystal defects due to the Oi precipitation readily reaches the device formation region (i.e., Si substrate surface). To suppress such generation of surface crystalline defects due to the Oi precipitation, the concentration of Oi in the Si substrate is held to be low, as disclosed in Japanese Patent Laid-Open No. 282,814/1989.
With the well-known extrinsic gettering process using polycrystalline silicon, the gettering effect of the polycrystalline silicon is reduced with the progress of the process of device manufacture. This is attributable to the following facts. First in a thermal treatment (for instance annealing or oxidation), crystal grains grow as grain boundaries are reduced. Since grain boundaries are a source of gettering, such thermal treatments result in a reduction of gettering capability. Second, in an oxidation step, the polycrystalline silicon is oxidized into a silicon oxide film thereby reducing the thickness of the polycrystalline silicon film itself.
Further, at the time of the polycrystalline silicon deposition (at a deposition temperature of about 600.degree. to 800.degree. C.), the generation of Oi precipitation nuclei can not be perfectly suppressed. If it is intended to cause partial generation of crystalline defects due to the Oi precipitation on the back surface side alone of the substrate, defects due to the Oi precipitation are readily generated in the neighborhood of the substrate surface, which constitutes a device formation region. In order to suppress the crystalline defects generation on the Si substrate surface due to the Oi precipitation, it is necessary to reduce the Oi concentration in the substrate to an extent free from the Oi precipitation. Doing so, however, disables application of the intrinsic gettering, which is most superior in view of the continuity of the gettering effect (see Japanese Journal of Applied Physics, Vol. 27, NO. 7, 1988, pp. 1,220 to 1,223).
With the Si substrate, to which has been applied the sole extrinsic gettering with the deposition of the polycrystalline silicon on the back surface of the substrate, the continuity of the gettering effect is low, thus posing the problem of the production yield reduction in the process of device manufacture. On the other hand, where the intrinsic gettering is applied in combination without provision of any limit of the Oi concentration, crystalline defects due to the Oi precipitation are generated greatly on the Si substrate surface. This again leads to the problem of the element production yield reduction.